Research Dossier / 03

Scalable Triangle Counting in Massive Graphs using GPU Acceleration

Research on high-performance triangle counting algorithms for large-scale sparse and dense graphs using GPU-accelerated parallel architectures.

Short LabelGPU Triangles
Institution
Research under Dr. Vishwesh Jatala, IIT Bhilai
Role
Researcher
Active Period
2024 - Present
CUDA
Graph Processing
Parallel Algorithms
Sparse Matrices

Method + iterations

Research steps, prototypes, and refinements along the way.

  1. Implemented parallel intersection

    based triangle counting using CUDA thread — level optimizations.

  2. Optimized adjacency list traversal with memory coalescing techniques.

  3. Reduced redundant computations using degree

    based node ordering heuristics.

  4. Introduced dynamic load balancing for high

    degree node partitions.

  5. Built profiling scripts for occupancy, memory throughput, and branch efficiency analysis.

  6. Benchmarked scalability across increasing graph sizes and compared with CPU

    based baselines.

Visual Notes

GRAPH PARALLELISM

GRAPH PARALLELISM

Massively parallel edge intersection strategies for high-speed triangle enumeration.

SPARSE MATRIX VIEW

SPARSE MATRIX VIEW

Sparse adjacency representations and ordered intersections for efficient triangle discovery.

SCALING CURVES

SCALING CURVES

Profiling and benchmark snapshots across graph sizes, highlighting GPU acceleration characteristics.

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